VeraGridEngine.Topology.GridReduction package

Submodules

VeraGridEngine.Topology.GridReduction.di_shi_grid_reduction module

VeraGridEngine.Topology.GridReduction.di_shi_grid_reduction.create_new_boundary_branches(grid: MultiCircuit, b_buses: IntVec, Yeq_1: csc_matrix, Ybbp_1: csc_matrix, tol: float, use_linear=False)

Parameters:

• grid

• b_buses

• Yeq_1

• Ybbp_1

• tol

• use_linear

Returns:

VeraGridEngine.Topology.GridReduction.di_shi_grid_reduction.di_shi_reduction(grid: MultiCircuit, reduction_bus_indices: IntVec, V0: CxVec, tol=1e-08) → Tuple[MultiCircuit, Logger]

In-place Grid reduction using the Di-Shi equivalent model from: Power System Network Reduction for Engineering and Economic Analysis by Di Shi, 2012 and Optimal Generation Investment Planning: Pt 1: Network Equivalents :param grid: MultiCircuit :param reduction_bus_indices: Bus indices of the buses to delete :param V0: Array of voltages for the non-reduced system :param tol: Tolerance, any equivalent power value under this is omitted

VeraGridEngine.Topology.GridReduction.di_shi_grid_reduction.find_gen_relocation(grid: MultiCircuit, reduction_bus_indices: Sequence[int])

Relocate generators :param grid: MultiCircuit :param reduction_bus_indices: array of bus indices to reduce (external set) :return: None

VeraGridEngine.Topology.GridReduction.di_shi_grid_reduction.get_reduction_sets_1(nc: NumericalCircuit, reduction_bus_indices: Sequence[int]) → Tuple[IntVec, IntVec, IntVec, IntVec]

Generate the set of bus indices for grid reduction :param nc: NumericalCircuit :param reduction_bus_indices: array of bus indices to reduce (external set) :return: external, boundary, internal, boundary_branches

VeraGridEngine.Topology.GridReduction.di_shi_grid_reduction.ward_reduction_linear(Ybus: csc_matrix, e_buses: ndarray[tuple[Any, ...], dtype[int64]], b_buses: ndarray[tuple[Any, ...], dtype[int64]], i_buses: ndarray[tuple[Any, ...], dtype[int64]])

Parameters:

• Ybus

• e_buses

• b_buses

• i_buses

Returns:

VeraGridEngine.Topology.GridReduction.di_shi_grid_reduction.ward_reduction_linear2(Ybus: csc_matrix, e_buses: ndarray[tuple[Any, ...], dtype[int64]], i_buses: ndarray[tuple[Any, ...], dtype[int64]])

Parameters:

• Ybus

• e_buses

• i_buses

Returns:

VeraGridEngine.Topology.GridReduction.di_shi_grid_reduction.ward_reduction_non_linear(nc: NumericalCircuit, e_buses, b_buses, i_buses, voltage: CxVec, Sbus: CxVec)

Parameters:

• nc

• e_buses

• b_buses

• i_buses

• voltage

• Sbus

Returns:

VeraGridEngine.Topology.GridReduction.ptdf_grid_reduction module

VeraGridEngine.Topology.GridReduction.ptdf_grid_reduction.compact_devices_after_reduction(grid: MultiCircuit, relocated_device_ids: Set[str], compensation_prefix: str = 'compensated') → Logger

Compact devices on each bus after PTDF reduction.

Per bus, keeps original devices individual and collapses: - External + compensation loads into one collapsed load - External + compensation non-SRAP gens into one collapsed generator - External + compensation SRAP gens into one collapsed generator

Parameters:

• grid – MultiCircuit (modified in place)

• relocated_device_ids – Set of device idtags that were relocated from external buses

• compensation_prefix – Prefix used to identify compensation devices

Returns:

Logger with info about collapsed devices

VeraGridEngine.Topology.GridReduction.ptdf_grid_reduction.get_Pgen(grid: MultiCircuit) → Tuple[Vec, Vec]

Get the complex bus power Injections due to the generation with and without srap :return: (nbus) [MW] no-srap generation, srap-generation

VeraGridEngine.Topology.GridReduction.ptdf_grid_reduction.get_Pgen_ts(grid: MultiCircuit) → Tuple[Mat, Mat]

Get the complex bus power Injections due to the generation with and without srap :return: (nbus) [MW] no-srap generation, srap-generation

VeraGridEngine.Topology.GridReduction.ptdf_grid_reduction.get_Pload(grid: MultiCircuit) → Vec

Get the complex bus power Injections due to the load with sign :return: (nbus) [MW ]

VeraGridEngine.Topology.GridReduction.ptdf_grid_reduction.get_Pload_ts(grid: MultiCircuit) → Mat

Get the complex bus power Injections due to the load with sign :return: (nbus) [MW ]

VeraGridEngine.Topology.GridReduction.ptdf_grid_reduction.get_reduction_sets(grid: MultiCircuit, reduction_bus_indices: Sequence[int], add_vsc=False, add_hvdc=False, add_switch=True) → Tuple[IntVec, IntVec, IntVec]

Generate the set of bus indices for grid reduction :param grid: MultiCircuit :param reduction_bus_indices: array of bus indices to reduce (external set) :param add_vsc: Include the list of VSC? :param add_hvdc: Include the list of HvdcLine? :param add_switch: Include the list of Switch? :return: external, boundary, internal, boundary_branches

VeraGridEngine.Topology.GridReduction.ptdf_grid_reduction.ptdf_reduction(grid: MultiCircuit, reduction_bus_indices: IntVec, tol=1e-08) → Tuple[MultiCircuit, Logger]

In-place Grid reduction using the PTDF injection mirroring This is the same concept as the Di-Shi reduction but using the PTDF matrix instead. :param grid: MultiCircuit :param reduction_bus_indices: Bus indices of the buses to delete :param tol: Tolerance, any equivalent power value under this is omitted

VeraGridEngine.Topology.GridReduction.ptdf_grid_reduction.ptdf_reduction_projected(grid: MultiCircuit, reduction_bus_indices: IntVec, tol=1e-08, distribute_slack: bool = True, compact_devices: bool = True) → Tuple[MultiCircuit, Logger]

In-place Grid reduction using the PTDF injection by projecting the generation and loads from the removed buses into the PTDF-sensitive buses :param grid: MultiCircuit :param reduction_bus_indices: Bus indices of the buses to delete :param tol: Tolerance, any equivalent power value under this is omitted :param distribute_slack: Distribute the slack? :param compact_devices: Collapse relocated and compensation devices after reduction

VeraGridEngine.Topology.GridReduction.ptdf_grid_reduction.ptdf_reduction_ree_bad(grid: MultiCircuit, reduction_bus_indices: IntVec, tol=1e-08) → Tuple[MultiCircuit, Logger]

In-place Grid reduction using the PTDF injection mirroring No theory available :param grid: MultiCircuit :param reduction_bus_indices: Bus indices of the buses to delete :param tol: Tolerance, any equivalent power value under this is omitted

VeraGridEngine.Topology.GridReduction.ptdf_grid_reduction.ptdf_reduction_ree_less_bad(grid: MultiCircuit, reduction_bus_indices: IntVec, tol=1e-08) → Tuple[MultiCircuit, Logger]

In-place Grid reduction using the PTDF injection mirroring No theory available :param grid: MultiCircuit :param reduction_bus_indices: Bus indices of the buses to delete :param tol: Tolerance, any equivalent power value under this is omitted

VeraGridEngine.Topology.GridReduction.ptdf_grid_reduction.relocate_injections(grid: MultiCircuit, reduction_bus_indices: Sequence[int]) → Set[str]

Relocate injection devices (generators, loads, etc.) from external buses to internal buses :param grid: MultiCircuit :param reduction_bus_indices: array of bus indices to reduce (external set) :return: Set of relocated device idtags

VeraGridEngine.Topology.GridReduction.ward_equivalents module

VeraGridEngine.Topology.GridReduction.ward_equivalents.get_reduction_sets_1(nc: NumericalCircuit, reduction_bus_indices: Sequence[int]) → Tuple[ndarray[tuple[Any, ...], dtype[int64]], ndarray[tuple[Any, ...], dtype[int64]], ndarray[tuple[Any, ...], dtype[int64]], ndarray[tuple[Any, ...], dtype[int64]]]

Generate the set of bus indices for grid reduction :param nc: NumericalCircuit :param reduction_bus_indices: array of bus indices to reduce (external set) :return: external, boundary, internal, boundary_branches

VeraGridEngine.Topology.GridReduction.ward_equivalents.ward_standard_reduction(grid: MultiCircuit, reduction_bus_indices: IntVec, V0: CxVec) → Tuple[MultiCircuit, Logger]

Ward standard reduction according to: REVIEW OF THE WARD CLASS OF EXTERNAL EQUIVALENTS FOR POWER SYSTEMS by J.W. Bandler, M.A. El-Kady and G. Centkowski, October 1983 :param grid: MultiCircuit :param reduction_bus_indices: Indices of the buses to reduce :param V0: Initial power flow voltages :return: Modified (in-place) MultiCircuit

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